| HY |
Hynix Memory |
|
| 27 |
Device Family |
27 = NAND Flash |
| X |
Power Supply |
U = 2.7V to 3.6VL = 2.7VS = 1.8V |
| X |
Classification |
S = Single Level Cell + Single Die + S/BA = Single Level Cell + Double Die + S/BB = Single Level Cell + Quadruple Die + S/BF = Single Level Cell + Single Die + L/BG = Single Level Cell + Double Die + L/BH = Single Level Cell + Quadruple Die + L/BM = Multi Level Cell + Single Die + S/BO = Multi Level Cell + Double Die + S/BP = Multi Level Cell + Quadruple Die + S/BT = Multi Level Cell + Single Die + L/BU = Multi Level Cell + Double Die + L/BV = Multi Level Cell + Quadruple Die + L/BW = Multi Level Cell + L/B |
| XX |
Bit Organization |
08 = x816 = x1632 = x32 |
| XX |
Density |
64 = 64Mbit28 = 128Mbit56 = 256Mbit12 = 512Mbit1G = 1Gbit2G = 2Gbit4G = 4Gbit8G = 8GbitAG = 16GbitBG = 32GbitCG = 64GbitDG = 128Gbit |
| X |
Mode |
1 = 1nCE & 1R/nB; Sequencial Row Read Enable2 = 1nCE & 1R/nB; Sequencial Row Read Disable4 = 2nCE & 2R/nB; Sequencial Row Read Enable5 = 2nCE & 2R/nB; Sequencial Row Read Disable6 = 1nCE &1R/nB; Sequencial Row Read Enable & Auto Read Page 07 = 2nCE & 2R/nB; Sequencial Row Read Enable & Auto Read Page 08 = 1nCE &1R/nB; Sequencial Row Read Disable & Auto Read Page 09 = 2nCE &2R/nB; Sequencial Row Read Disable & Auto Read Page 0D = Dual interface; Sequential Row Read DisableF = 4nCE & 4R/B; Sequencial Row Read Disable |
| X |
Version |
M = 1st GenerationA = 2nd GenerationB = 3rd GenerationC = 4th Generation1 = Down Density (1st)2 = Down Density (2nd) |
| X |
Package Type |
T = TSOPV = WSOPS = USOPF = FBGA (63ball)B = FBGA (107ball)G = FBGA (149ball)H = TBGAL = LGAU = ULGAW = WaferC = ChipK = KGBD = PGD2 |
| X |
Package Material |
Blank = Normal, Wafer, Chip, KGBP = Lead FreeH = Halogen FreeR = Lead & Halogen Free |
| X |
Operating Temperature |
Blank = Wafer, ChipC = 0°C to 70°CE = -25°C to 85°CM = -30°C to 85°CI = -40°C to 85°C |
| X |
Bad Block |
Blank = WaferB = Included Bad BlockS = 1 - 5 Bad BlockP = All Good Block |
| X |
Customer Initial Option |
|
