| MT | Micron Technology | |
| XXXZ* | Product Family | 29C = SLC NAND + LPDDR (MCP/PoP)29D = SLC NAND + LPDDR + MLC e-MMC (MCP/PoP)29J = LPDDR + SLC e-MMC29K = LPDDR + MLC e-MMC29M = LPDDR2-S4 + SLC e-MMC29P = LPDDR2-S4 + MLC e-MMC29Q = SLC e-MMC + MLC e-MMC (MCP/PoP)29R = LPDDR2-S4 + SLC NAND29T = LPDDR3-S4 + MLC e-MMC29U = LPDDR3-S4 + SLC NAND29V = LPDDR-S4 + MLC/TLC e-MMC/UFS*Z = is used as a placeholder character |
| X | NAND Flash Density | T = 768MbitU = 640MbitV = 512MbitW = 256MbitX = 128MbitY = 64Mbit1 = 1Gbit2 = 2Gbit3 = 3Gbit4 = 4Gbit6 = 6Gbit7 = 7Gbit8 = 8Gbit9 = 12GbitA = 16GbitB = 48GbitC = 64Gbit*Z = is used a placeholder character |
| X | NAND Flash Width | A = x4B = x8C = x16D = x32E = x64F = x96*Z = is used as a placeholder character |
| X | LPDRAM Density | T = 768MbitU = 640MbitV = 512MbitW = 256MbitX = 128MbitY = 64Mbit1 = 1Gbit2 = 2Gbit3 = 3Gbit4 = 4Gbit6 = 6Gbit7 = 7Gbit8 = 8Gbit9 = 12GbitA = 16GbitB = 48GbitC = 64Gbit*Z = is used as a placeholder character |
| X | LPDRAM Width | A = x4B = x8C = x16D = x32E = x64F = x96*Z = is used as a placeholder character |
| X | e-MMC Density | V = 512MByteW = 256MByteX = 128MByteY = 64MByte1 = 1GByte2 = 2GByte4 = 4GByte5 = 8GByte6 = 16GByte7 = 32GByte8 = 64GByte9 = 128GByteA = 256GByteB = 512GByte*Z = is used as a placeholder character |
| X | e-MMC Controller Version | A = e-MMC version 4.41 PL_REGB = e-MMC version 4.51 DC PL_REGC = e-MMC version 4.41 DC PL_REGD = e-MMCE = e-MMC version 5.1F = e-MMC version 1.3H = e-MMC version 1.8J = e-MMC version 5.0K = e-MMC version 4.2L = e-MMC version 4.2/4.3M = e-MMC version 4.2/4.3N = e-MMC version 4.4P = e-MMC version 4.4Q = e-MMC version 4.4R = e-MMC version 4.41S = e-MMC version 4.41T = e-MMC version 4.41U = e-MMC version 4.41V = e-MMC version 4.5W = e-MMC version 4.5X = e-MMC version 4.41Y = e-MMC version 5.0*Z |
| X | Operating Voltage Range | A = NAND: Vcc=N/A; LPDRAM: Vdd=1.8V, Vddq=1.8V;e-MMC: Vccm=1.8V, Vccqm=1.8VB = NAND: Vcc=1.8V; LPDRAM: Vdd=1.8V, Vddq=1.2V;e-MMC: Vccm=1.8V, Vccqm=1.8VC = NAND: Vcc=1.8V; LPDRAM: Vdd=1.35V, Vddq=1.2V;e-MMC: Vccm=1.8V, Vccqm=1.8VD = NAND: Vcc=1.8V; LPDRAM: Vdd=1.2V, Vddq=1.2V;e-MMC: Vccm=1.8V, Vccqm=1.8VE = NAND: Vcc=1.8; LPDRAM: Vdd=1.8V, Vddq=1.8V;e-MMC: Vccm=3.3V, Vccqm=1.8/3.3VF = NAND: Vcc=1.8V; LPDRAM: Vdd=1.8V, Vddq=1.8V;e-MMC: Vccm=1.8V, Vccqm=1.8VG = NAND: Vcc=N/A; LPDRAM: Vdd=1.8V, Vddq=1.8V;e-MMC: Vccm=3.3V, Vccqm=1.8/3.3VH = NAND: Vcc=1.8V; LPDRAM: Vdd=1.2V, Vddq=1.2V;e-MMC: Vccm=N/A, Vccqm=N/AJ = NAND: Vcc=N/A; LPDRAM: Vdd=1.2V, Vddq=1.2V;e-MMC: Vccm=1.8V, Vccqm=1.8VK = NAND: Vcc=N/A; LPDRAM: Vdd=1.2V, Vddq=1.2V;e-MMC: Vccm=3.3V, Vccqm=1.8/3.3VL = NAND: Vcc=N/A; LPDRAM: Vdd=N/A, Vddq=1.2V;e-MMC: Vccm=1.8V, Vccqm=1.8/3.3VM = NAND: Vcc=1.8V; LPDRAM: Vdd=1.8V, Vddq=1.2V;e-MMC: Vccm=1.8V, Vccqm=N/AN = NAND: Vcc=3.3V; LPDRAM: Vdd=1.2V, Vddq=1.2V;e-MMC: Vccm=N/A, Vccqm=N/AP = NAND: VCC=N/A; LPDRAM: VDD=1.1V, VDDQ=1.1V,e-MMC: VCCM=3.3V, VCCQM = 1.8VQ = NAND: VCC=N/A; LPDRAM: VDD=1.1V, VDDQ=0.6V,e-MMC: VCCM=3.3V, VCCQM = 1.8VR = NAND: VCC=N/A; LPDRAM: VDD=1.1V, VDDQ=0.4V,e-MMC: VCCM=3.3V, VCCQM = 1.8V |
| X | Chip Count | A = 1 NAND Flash (CE#0); 1 LPDRAM; 1 e-MMCB = 2 NAND Flash (CE#0); 1 LPDRAM; 1 e-MMCC = 1 NAND Flash (CE#0); 2 LPDRAM (CS0#0)/CS1#; 1 e-MMCD = 2 NAND Flash (CE#0); 2 LPDRAM (CS0#/CS1#); 1 e-MMCE = 0 NAND Flash; 1 LPDRAM; 1 e-MMCF = 0 NAND Flash; 2 LPDRAM (CS0#/CS1#); 1 e-MMCG = 1 NAND Flash; 1 LPDRAM; 0 e-MMCH = 1 NAND Flash; 2 LPDRAM; 0 e-MMCI = 2 NAND Flash; 2 LPDRAM; 0 e-MMCJ = 0 NAND Flash; 0 LPDRAM; 2 e-MMCK = 0 NAND Flash; 4 LPDRAM; 1 e-MMCL = 0 NAND Flash; 3 LPDRAM; 1 e-MMCM = 2 NAND Flash; 1 LPDRAM; 0 e-MMCN = 4 NAND Flash; 4 LPDRAM, 0 e-MMCO = 0 NAND Flash, 6 LPDRAM; 1 e-MMC |
| XX | Packge Code | Contact factory |
| X | LPDRAM Speed Grade | 046 = 2133MHz (LPDDR 4266)062 = 1600MHz (LPDDR 3200)107 = 933MHz (LPDDR 1866)125 = 800MHz (LPDDR1600)18 = 533MHz CL8 (LPDDR 1066)25 = 400MHz CL6 (LPDDR 800)3 = 333MHz CL5 (LPDDR 667)37 = 266MHz CL4 (LPDDR 533)5 = 200MHz CL3 (LPDDR 400)53 = 1866MHz (LPDDR 3732)54 = 128MHz CL3 (LPDDR 1)6 = 166MHz CL3 (LPDDR 333)75 = 133MHz CL3 (LPDDR 266) |
| X | Operating Temperature Range | A = Automotive (-40°C to 105°C)I = Industrial (-40°C to 85°C)W = Wireless (-25°C to 85°C) |
| X | Special Options | Blank = StandardA = Customer variantB = 2MB boot area / 2MB RPMBE = On-die ECC enabledF = SEC COUNT / custom boot area / custom RPBM |
| XX | Production Status | Blank = ProductionES = Engineering samplesMS = Mechanical samples |
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| XXX | Die Revision Code | Contact factory |
